Asynchronous Event-Driven Clocking and Control in Pipelined ADCs

An asynchronous event-driven approach to clocking and timing control is explored in the context of pipelined ADCs. It is shown how a conventional global clock tree can be replaced by localized control units coordinated through inter-stage communication protocols. The approach is found to yield many...

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Vydané v:	IEEE transactions on circuits and systems. I, Regular papers Ročník 68; číslo 7; s. 2813 - 2826
Hlavní autori:	Hershberg, Benjamin, van Liempd, Barend, Markulic, Nereo, Lagos, Jorge, Martens, Ewout, Dermit, Davide, Craninckx, Jan
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.07.2021 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	A/D ADC Amplifiers asynchronous clock tree Clocks CMOS Control equipment deep pipeline Delays dynamic Energy conversion efficiency event-driven Figure of merit Generators high speed low power pipeline pipelined ADC Pipelines Power efficiency Quantization (signal) ring amplifier ringamp Robust control Switches Synchronism Topology
ISSN:	1549-8328, 1558-0806
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