Concatenated BCH and LDPC Coding Scheme With Iterative Decoding Algorithm for Flash Memory

As adopting a very powerful error-correcting code gradually becomes a strategic demand for the endurance of nowadays flash memory, LDPC codes are recently proposed due to their outstanding error correcting capability. However, the error floor phenomenon of LDPC codes might not meet the extreme low e...

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Vydané v:	IEEE communications letters Ročník 19; číslo 3; s. 327 - 330
Hlavný autor:	Shieh, Shin-Lin
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.03.2015 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Ash Bit error rate Decoding Encoding Iterative decoding Reliability flash memory error floor concatenated code BCH code Low-density parity-check code
ISSN:	1089-7798, 1558-2558
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