Utilizing memory bandwidth in DSP embedded processors

This paper presents a network flow approach to solving the register binding and allocation problem for multiword memory access DSP processors. In recently announced DSP processors, such as Star*core, sixteen bit instructions which simultaneously access four words from memory are supported. A polynom...

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Vydané v:	Design Automation, 2001 Proceedings s. 347 - 352
Hlavný autor:	Gebotys, Catherine H.
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	New York, NY, USA ACM 01.01.2001 IEEE
Edícia:	ACM Conferences
Predmet:	Applied computing > Physical sciences and engineering > Electronics Applied computing > Physical sciences and engineering > Engineering Bandwidth Computer systems organization > Architectures Computer systems organization > Dependable and fault-tolerant systems and networks Computer systems organization > Embedded and cyber-physical systems Computer systems organization > Real-time systems Costs Digital signal processing Energy dissipation General and reference > Cross-computing tools and techniques > Performance Hardware > Electronic design automation > Methodologies for EDA Hardware > Integrated circuits > Logic circuits > Arithmetic and datapath circuits Hardware > Integrated circuits > Logic circuits > Design modules and hierarchy High level languages Intelligent networks Networks > Network performance evaluation Optimizing compilers Permission Power generation Registers
ISBN:	1581132972, 9781581132977
ISSN:	0738-100X
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