Buffer Insertion for Bridges and Optimal Buffer Sizing for Communication Sub-System of Systems-on-Chip

We have presented an optimal buffer sizing and buffer insertion methodology which uses stochastic models of the architecture and Continuous Time Markov Decision Processes CTMDPs. Such amethodology is useful in managing the scarce buffer resources available on chip as compared to network based data c...

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Veröffentlicht in:	Design, Automation and Test in Europe S. 826 - 827
Hauptverfasser:	Kallakuri, Sankalp S., Doboli, Alex, Feinberg, Eugene A.
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	Washington, DC, USA IEEE Computer Society 07.03.2005 IEEE
Schriftenreihe:	ACM Conferences
Schlagworte:	Bridges Communication system traffic control Hardware > Communication hardware, interfaces and storage > Buses and high-speed links Hardware > Electronic design automation > High-level and register-transfer level synthesis > Datapath optimization Hardware > Electronic design automation > Logic synthesis > Circuit optimization Hardware > Hardware validation Linear systems Mathematical model Mathematics of computing > Probability and statistics > Probabilistic representations > Markov networks Mathematics of computing > Probability and statistics > Stochastic processes Mathematics of computing > Probability and statistics > Stochastic processes > Markov processes Nonlinear equations Power system modeling Stochastic processes Stochastic systems System testing Theory of computation > Theory and algorithms for application domains > Machine learning theory > Markov decision processes Traffic control
ISBN:	9780769522883, 0769522882
ISSN:	1530-1591
Online-Zugang:	Volltext
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