Implementation of a novel angular hall encoder for field oriented control of high speed and experimental motors

The aim of this paper is to investigate possibilities of an application of low-cost angular Hall encoder for an experimental high speed Permanent Magnet Synchronous Motor (PMSM). First, a brief overview of angular encoders is introduced. The possibilities of using standard types of sensors for PMSM...

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Bibliographic Details
Published in:2016 17th International Conference on Mechatronics - Mechatronika (ME) pp. 1 - 7
Main Authors: Novak, Zdenek, Novak, Martin
Format: Conference Proceeding
Language:English
Published: Czech Technical University in Prague 01.12.2016
Subjects:
angular Hall encoder
field oriented control
field programmable gate array
Field programmable gate arrays
Magnetic sensors
Permanent magnet motors
Sensorless control
Signal processing algorithms
Voltage control
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Summary:The aim of this paper is to investigate possibilities of an application of low-cost angular Hall encoder for an experimental high speed Permanent Magnet Synchronous Motor (PMSM). First, a brief overview of angular encoders is introduced. The possibilities of using standard types of sensors for PMSM are provided together with limits of their application. A recently introduced industrial angular Hall encoder iC-MH16, with a possibility of real time full resolution of 12-bits up to 200 000 rpm, is then presented. Its principle and a possible application range is described. This sensor is then applied to an industrial motor equipped with a regular position resolver. By reading the angular position from the output of both sensors, performance of Hall encoder is evaluated. After the evaluation, a new high speed experimental PMSM is designed with a possibility of using the introduced angular Hall encoder. This motor is then operated using Field Oriented Control (FOC) fully implemented on the Field Programmable Gate Array (FPGA). The applied control algorithm is described as well, with a focus on timing requirements and optimization of FPGA resources.