Li, Y., & Press, T. U. (2015). Input/Output Interface Controller Design in Verilog HDL. Computer Principles and Design in Verilog HDL, 443-508. https://doi.org/10.1002/9781118841105.ch14
Citácia podle Chicago (17th ed.)Li, Yamin, a Tsinghua University Press. "Input/Output Interface Controller Design in Verilog HDL." Computer Principles and Design in Verilog HDL 2015: 443-508. https://doi.org/10.1002/9781118841105.ch14.
Citácia podľa MLA (8th ed.)Li, Yamin, a Tsinghua University Press. "Input/Output Interface Controller Design in Verilog HDL." Computer Principles and Design in Verilog HDL, 2015, pp. 443-508, https://doi.org/10.1002/9781118841105.ch14.
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