VirtualSync+: Timing Optimization With Virtual Synchronization

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Bibliographic Details
Published in:	IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 41; pp. 5526 - 5540
Main Authors:	Grace Li Zhang, Bing Li, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann
Format:	Journal Article
Language:	Japanese
Published:	Institute of Electrical and Electronics Engineers (IEEE) 01.12.2022
Subjects:	Computer Science - Hardware Architecture FOS: Computer and information sciences Hardware Architecture (cs.AR)
ISSN:	0278-0070, 1937-4151
Online Access:	Get full text
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Description
ISSN:	0278-0070 1937-4151
DOI:	10.1109/tcad.2022.3153433