FPGA Implementation of a Probabilistic Neural Network for Spike Sorting

Hardware implementation of Neural Networks (NNs) provides advantages such as parallelism and real-time capabilities, whereas Probabilistic Neural Networks (PNNs) achieve high accuracy in pattern discrimination. In this paper, a FPGA implementation of a PNN sorting algorithm is proposed to sort spike...

Celý popis

Uložené v:
Podrobná bibliografia
Vydané v:2010 2nd International Conference on Information Engineering and Computer Science s. 1 - 4
Hlavní autori: Xiaoping Zhu, Longtao Yuan, Dong Wang, Yaowu Chen
Médium: Konferenčný príspevok..
Jazyk:English
Vydavateľské údaje: IEEE 01.12.2010
Predmet:
Artificial neural networks
Biological neural networks
Clocks
Field programmable gate arrays
Probabilistic logic
Sorting
Training
ISBN:1424479398, 9781424479399
ISSN:2156-7379
On-line prístup:Získať plný text
Tagy: Pridať tag
Žiadne tagy, Buďte prvý, kto otaguje tento záznam!
Popis
Shrnutí:Hardware implementation of Neural Networks (NNs) provides advantages such as parallelism and real-time capabilities, whereas Probabilistic Neural Networks (PNNs) achieve high accuracy in pattern discrimination. In this paper, a FPGA implementation of a PNN sorting algorithm is proposed to sort spikes. Both Matlab-based and FPGA-based sorting algorithms using a PNN were implemented and evaluated, and results show that FPGA's implementation is about 44.37 times faster than Matlab's realization with the same accuracy. This novel method indicates that the performance of current FPGAs is capable of portable device application.
ISBN:1424479398
9781424479399
ISSN:2156-7379
DOI:10.1109/ICIECS.2010.5677694