Hybrid Decoding for Polar Codes

Among various polar decoding algorithms, SC-List [2] and SC-Flip [3] suffer from high hardware complexity and long decoding latency, respectively. In this paper, a novel hybrid decoding algorithm is proposed to achieve affordable hardware complexity with a suitable decoding latency. According to the...

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Veröffentlicht in:2018 International SoC Design Conference (ISOCC) S. 121 - 122
Hauptverfasser: Choi, Soyeon, Yoo, Hoyoung
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 01.11.2018
Schlagworte:
Complexity theory
Decoding
Error correction codes
Hardware
hybrid decoding
Indexes
polar codes
Reliability
SC-List decoding
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Zusammenfassung:Among various polar decoding algorithms, SC-List [2] and SC-Flip [3] suffer from high hardware complexity and long decoding latency, respectively. In this paper, a novel hybrid decoding algorithm is proposed to achieve affordable hardware complexity with a suitable decoding latency. According to the experimental results, the proposed method affords a comparable error-correcting performance to that of SC-List [2] and SC-Flip [3] counter parts.
DOI:10.1109/ISOCC.2018.8649922