Hybrid Decoding for Polar Codes

Among various polar decoding algorithms, SC-List [2] and SC-Flip [3] suffer from high hardware complexity and long decoding latency, respectively. In this paper, a novel hybrid decoding algorithm is proposed to achieve affordable hardware complexity with a suitable decoding latency. According to the...

Full description

Saved in:
Bibliographic Details
Published in:2018 International SoC Design Conference (ISOCC) pp. 121 - 122
Main Authors: Choi, Soyeon, Yoo, Hoyoung
Format: Conference Proceeding
Language:English
Published: IEEE 01.11.2018
Subjects:
Complexity theory
Decoding
Error correction codes
Hardware
hybrid decoding
Indexes
polar codes
Reliability
SC-List decoding
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Among various polar decoding algorithms, SC-List [2] and SC-Flip [3] suffer from high hardware complexity and long decoding latency, respectively. In this paper, a novel hybrid decoding algorithm is proposed to achieve affordable hardware complexity with a suitable decoding latency. According to the experimental results, the proposed method affords a comparable error-correcting performance to that of SC-List [2] and SC-Flip [3] counter parts.
DOI:10.1109/ISOCC.2018.8649922