A Low-Complexity Decoder for Turbo Product Codes Based on Extended Hamming Codes

In this paper, a modified low-complexity Chase-II decoding algorithm for Turbo product codes(TPCs) and the corresponding hardware architecture are proposed. The proposed decoding algorithm is based on a low-complexity Fast Chase algorithm proposed in [1]. To further reduce the computational complexi...

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Vydáno v:Proceedings (International Conference on Communication Technology. Online) s. 99 - 103
Hlavní autoři: Wang, Yaqi, Lin, Jun, Wang, Zhongfeng
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 01.10.2018
Témata:
Block codes
block turbo codes
Complexity theory
Computer architecture
Decoding
Hardware
hardware architecture
Product codes
Reliability
Turbo product codes
very large scale integration
ISSN:2576-7828
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Shrnutí:In this paper, a modified low-complexity Chase-II decoding algorithm for Turbo product codes(TPCs) and the corresponding hardware architecture are proposed. The proposed decoding algorithm is based on a low-complexity Fast Chase algorithm proposed in [1]. To further reduce the computational complexity, the number of the candidate codewords used to generate the extrinsic information is reduced to 2, and a new low-complexity method of calculating the extrinsic information is proposed. The proposed algorithm saves 44% real additions. The numerical simulation results show that the proposed algorithm has negligible performance loss if the component codes of TPCs are hamming codes. Moreover, an efficient hardware architecture for a (128,120)^{2} extended Hamming turbo product code is also proposed. The proposed decoder is synthesised under the TSMC 90-nm CMOS technology. The synthesised results show that the proposed decoder reaches a 10.5 Gbps throughput with an area of 1.7 Mgates.
ISSN:2576-7828
DOI:10.1109/ICCT.2018.8599928