A Performance Analytical Approach Based on Queuing Model for Network-on-Chip
To establish a highly-efficient analytical performance model of routers is crucial for the design of NoC. In this paper, an analytical router performance model which is based on M/D/1/B queuing theory is proposed to analyze various packet blockings at the input buffers during the transfer process, a...
Gespeichert in:
| Veröffentlicht in: | 2010 3rd International Symposium on Parallel Architectures, Algorithms and Programming S. 354 - 359 |
|---|---|
| Hauptverfasser: | , , , |
| Format: | Tagungsbericht |
| Sprache: | Englisch |
| Veröffentlicht: |
IEEE
01.12.2010
|
| Schlagworte: | |
| ISBN: | 1424494826, 9781424494828 |
| ISSN: | 2168-3034 |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Zusammenfassung: | To establish a highly-efficient analytical performance model of routers is crucial for the design of NoC. In this paper, an analytical router performance model which is based on M/D/1/B queuing theory is proposed to analyze various packet blockings at the input buffers during the transfer process, and then a computing method based on Markov chain for flow-control feedback probability is presented to estimate some key metrics in terms of buffer utilization, etc. Compared with BookSim, a famous cycle-accurate NoC simulator, the results show that the average error of the computing method for the flow-control feedback probability is 7.87%. |
|---|---|
| ISBN: | 1424494826 9781424494828 |
| ISSN: | 2168-3034 |
| DOI: | 10.1109/PAAP.2010.46 |

