A Performance Analytical Approach Based on Queuing Model for Network-on-Chip
To establish a highly-efficient analytical performance model of routers is crucial for the design of NoC. In this paper, an analytical router performance model which is based on M/D/1/B queuing theory is proposed to analyze various packet blockings at the input buffers during the transfer process, a...
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| Published in: | 2010 3rd International Symposium on Parallel Architectures, Algorithms and Programming pp. 354 - 359 |
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| Main Authors: | , , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
01.12.2010
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| Subjects: | |
| ISBN: | 1424494826, 9781424494828 |
| ISSN: | 2168-3034 |
| Online Access: | Get full text |
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| Summary: | To establish a highly-efficient analytical performance model of routers is crucial for the design of NoC. In this paper, an analytical router performance model which is based on M/D/1/B queuing theory is proposed to analyze various packet blockings at the input buffers during the transfer process, and then a computing method based on Markov chain for flow-control feedback probability is presented to estimate some key metrics in terms of buffer utilization, etc. Compared with BookSim, a famous cycle-accurate NoC simulator, the results show that the average error of the computing method for the flow-control feedback probability is 7.87%. |
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| ISBN: | 1424494826 9781424494828 |
| ISSN: | 2168-3034 |
| DOI: | 10.1109/PAAP.2010.46 |

