System level design and verification using a synchronous language

Synchronous languages such as Esterel, Lustre, Signal, and others were originally developed for safety-critical embedded software and compiled into C. They have recently been extended to hardware with new language features and compilers to RTL. Contrary to traditional HDL languages (Verilog, VHDL) a...

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Bibliographische Detailangaben

Veröffentlicht in:	2003 IEEE/ACM International Computer-Aided Design S. 433 - 439
Hauptverfasser:	Berry, G., Kishinevsky, M., Singh, S.
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 2003
Schlagworte:	Automata Communication system control Formal verification Hardware design languages Permission Protocols Signal design Software safety Space exploration System-level design
ISBN:	9781581137620, 1581137621
Online-Zugang:	Volltext
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