Conditionally Executed Tests, Branching and Algorithmic Binning - Getting IT Right

Test programs for large SOCs contain complex flow and binning logic. To perform tasks such as memory repair, trimming and speed binning, flows are non-deterministic and incorporate branching, loops and conditional test execution. Binning decisions are made based on elaborate algorithms. Testing mult...

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Bibliographic Details
Published in:2022 China Semiconductor Technology International Conference (CSTIC) pp. 1 - 3
Main Author: Chan, Lai-Choon
Format: Conference Proceeding
Language:English
Published: IEEE 20.06.2022
Subjects:
Complexity theory
Computer bugs
Encoding
Maintenance engineering
Performance evaluation
Task analysis
Testing
Online Access:Get full text
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Summary:Test programs for large SOCs contain complex flow and binning logic. To perform tasks such as memory repair, trimming and speed binning, flows are non-deterministic and incorporate branching, loops and conditional test execution. Binning decisions are made based on elaborate algorithms. Testing multiple devices in parallel adds another dimension of complexity, which increases the possibility of coding errors. To eliminate such errors, the test program needs to be checked. Current methods of verification have drawbacks. This paper introduces a tool that addresses the deficiencies using speed binning as an example.
DOI:10.1109/CSTIC55103.2022.9856766