Qubit placement to minimize communication overhead in 2D quantum architectures

Regular, local-neighbor topologies of quantum architectures restrict interactions to adjacent qubits, which in turn increases the latency of quantum circuits mapped to these architectures. To alleviate this effect, optimization methods that consider qubit-to-qubit interactions in 2D grid architectur...

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Veröffentlicht in:	Proceedings of the ASP-DAC ... Asia and South Pacific Design Automation Conference S. 495 - 500
Hauptverfasser:	Shafaei, Alireza, Saeedi, Mehdi, Pedram, Massoud
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 01.01.2014
Schlagworte:	Benchmark testing Computer architecture Linear programming Logic gates Optimization Quantum computing Very large scale integration
ISSN:	2153-6961
Online-Zugang:	Volltext
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