Performance Tuning of Tile Matrix Decomposition

Task parallel algorithms have attracted attention as algorithms for highly parallel architectures in recent years. The aim of such algorithms is to keep all computing resources running without stalling by executing a large number of fine-grained tasks asynchronously while observing data dependencies...

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Veröffentlicht in:	2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) S. 25 - 31
1. Verfasser:	Suzuki, Tomohiro
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 01.10.2019
Schlagworte:	Computational modeling Kernel Matrix decomposition multi-core/many-core architecture Numerical models Plasmas Symmetric matrices Task analysis tile algorithm
Online-Zugang:	Volltext
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