Low-Bit Precision Neural Network Architecture with High Immunity to Variability and Random Telegraph Noise based on Resistive Memories

In-memory computing architectures based on Resistive random access memory technologies (RRAM) are a promising candidate for the development of ultra-low power hardware accelerators that could enable the deployment of deep neural networks inference algorithms on energy constrained devices at the edge...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	IEEE International Reliability Physics Symposium proceedings S. 1 - 6
Hauptverfasser:	Zanotti, Tommaso, Puglisi, Francesco Maria, Pavan, Paolo
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 01.03.2021
Schlagworte:	Analytical models BNN Brain modeling Compact Modeling Computer architecture Data models Hardware Resistance Resistive RAM RRAM RTN
ISSN:	1938-1891
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!