Abbasi, N., Athow, J., & Amer, A. (2009, November). Real-time FPGA architecture of modified Stable Euler-Number algorithm for image binarization. 2009 16th IEEE International Conference on Image Processing (ICIP), 3253-3256. https://doi.org/10.1109/ICIP.2009.5413985
Chicago Style (17th ed.) CitationAbbasi, N., J. Athow, and A. Amer. "Real-time FPGA Architecture of Modified Stable Euler-Number Algorithm for Image Binarization." 2009 16th IEEE International Conference on Image Processing (ICIP) Nov. 2009: 3253-3256. https://doi.org/10.1109/ICIP.2009.5413985.
MLA (9th ed.) CitationAbbasi, N., et al. "Real-time FPGA Architecture of Modified Stable Euler-Number Algorithm for Image Binarization." 2009 16th IEEE International Conference on Image Processing (ICIP), Nov. 2009, pp. 3253-3256, https://doi.org/10.1109/ICIP.2009.5413985.