Measuring Area-Complexity Using Boolean Difference

For a combinational circuit, area-complexity is a measure that estimates the logic area of the circuit without mapping to logic gates. Several measures like literal count, number of primary input/outputs, etc. have been used in the past as area-complexity metrics. In this paper, we propose a novel a...

Celý popis

Uložené v:

Podrobná bibliografia
Vydané v:	2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems s. 245 - 250
Hlavní autori:	Kagliwal, A., Balachandran, S.
Médium:	Konferenčný príspevok.. Journal Article
Jazyk:	English
Vydavateľské údaje:	IEEE 01.01.2013
Predmet:	Area measurement area-complexity Benchmark testing Boolean algebra Boolean difference Boolean functions Circuits Complexity theory Conferences Design engineering Integrated circuits Logic Logic gates logic synthesis Taylor series Very large scale integration
ISBN:	146734639X, 9781467346399
ISSN:	1063-9667
On-line prístup:	Získať plný text
Tagy:	Pridať tag Žiadne tagy, Buďte prvý, kto otaguje tento záznam!

Buďte prvý, kto okomentuje tento záznam!