FPGA Based Implementation Scenarios of TEA Block Cipher

Transmission of sensitive data over some channel is a highly security constrained scenario and thus demands the application of some encryption algorithm. It is better to implement the algorithm in hardware as compared to software due to better computational speed and memory usage. Tiny Encryption Al...

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Vydáno v:2015 13th International Conference on Frontiers of Information Technology (FIT) s. 283 - 286
Hlavní autoři: Hussain, Muhammad Awais, Badar, Rabiah
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 01.12.2015
Témata:
Algorithm design and analysis
Ciphers
Clocks
Encryption
Field programmable gate arrays
Fiestel
FPGA
Hardware
HDL
tiny encryption algorithm
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Shrnutí:Transmission of sensitive data over some channel is a highly security constrained scenario and thus demands the application of some encryption algorithm. It is better to implement the algorithm in hardware as compared to software due to better computational speed and memory usage. Tiny Encryption Algorithm known as TEA block cipher is a light-weight and efficient cryptographic algorithm, well suited for wireless communication systems. This paper presents the successful implementation of TEA on FPGA for different design approaches to analyze the performance and resource utilization against each design approach.
DOI:10.1109/FIT.2015.56