FPGA Based Implementation Scenarios of TEA Block Cipher

Transmission of sensitive data over some channel is a highly security constrained scenario and thus demands the application of some encryption algorithm. It is better to implement the algorithm in hardware as compared to software due to better computational speed and memory usage. Tiny Encryption Al...

Full description

Saved in:

Bibliographic Details
Published in:	2015 13th International Conference on Frontiers of Information Technology (FIT) pp. 283 - 286
Main Authors:	Hussain, Muhammad Awais, Badar, Rabiah
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.12.2015
Subjects:	Algorithm design and analysis Ciphers Clocks Encryption Field programmable gate arrays Fiestel FPGA Hardware HDL tiny encryption algorithm
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!

Description
Summary:	Transmission of sensitive data over some channel is a highly security constrained scenario and thus demands the application of some encryption algorithm. It is better to implement the algorithm in hardware as compared to software due to better computational speed and memory usage. Tiny Encryption Algorithm known as TEA block cipher is a light-weight and efficient cryptographic algorithm, well suited for wireless communication systems. This paper presents the successful implementation of TEA on FPGA for different design approaches to analyze the performance and resource utilization against each design approach.
DOI:	10.1109/FIT.2015.56