Low error-floor majority-logic decoding based algorithm for non-binary LDPC codes
The traditional majority-logic decoding (MLgD) based algorithms suffer error-floors for decoding non-binary LDPC codes with small column weights. This paper presents a bit-reliability based MLgD (BRB-MLgD) algorithm with low error-floors for non-binary LDPC codes. The proposed algorithm is carried o...
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| Veröffentlicht in: | 2015 IEEE International Conference on Communications (ICC) S. 4072 - 4076 |
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| Hauptverfasser: | , , , |
| Format: | Tagungsbericht |
| Sprache: | Englisch |
| Veröffentlicht: |
IEEE
01.06.2015
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| Schlagworte: | |
| ISSN: | 1550-3607 |
| Online-Zugang: | Volltext |
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| Zusammenfassung: | The traditional majority-logic decoding (MLgD) based algorithms suffer error-floors for decoding non-binary LDPC codes with small column weights. This paper presents a bit-reliability based MLgD (BRB-MLgD) algorithm with low error-floors for non-binary LDPC codes. The proposed algorithm is carried out based on the binary representations of non-binary symbols. The reliability update along each edge of the Tanner graph of a non-binary LDPC code is in terms of bits rather than symbols. Thus, its computational complexity and memory consumption are less than those of the existing MLgD based algorithms. Simulation results indicate that the proposed algorithm can significantly reduce error-floors with small performance degradation in the waterfall region. |
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| ISSN: | 1550-3607 |
| DOI: | 10.1109/ICC.2015.7248961 |