Write-Avoiding Algorithms

Communication, i.e., moving data between levels of a memory hierarchy or between processors over a network, is much more expensive (in time or energy) than arithmetic. There has thus been a recent focus on designing algorithms that minimize communication and, when possible, attain lower bounds on th...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	Proceedings - IEEE International Parallel and Distributed Processing Symposium S. 648 - 658
Hauptverfasser:	Carson, Erin, Demmel, James, Grigori, Laura, Knight, Nicholas, Koanantakool, Penporn, Schwartz, Oded, Simhadri, Harsha Vardhan
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 01.05.2016
Schlagworte:	Algorithm design and analysis communication avoiding algorithms Hardware Krylov subspace methods Linear algebra Load modeling lower bounds N-body methods Non-volatile memories Nonvolatile memory Program processors Schedules write complexity
ISSN:	1530-2075
Online-Zugang:	Volltext
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