FPGA Hardware Design for Plenoptic 3D Image Processing Algorithm Targeting a Mobile Application
Over the past years, widespread use of applications based on 3D image processing has increased rapidly. It is being employed in various fields, such as research, medicine and automation. Plenoptic camera system is used to capture light-field that can be exploited to estimate the 3D depth of the scen...
Uložené v:
| Vydané v: | Proceedings of the ... IEEE International Conference on Acoustics, Speech and Signal Processing (1998) s. 7863 - 7867 |
|---|---|
| Hlavní autori: | , |
| Médium: | Konferenčný príspevok.. |
| Jazyk: | English |
| Vydavateľské údaje: |
IEEE
06.06.2021
|
| Predmet: | |
| ISSN: | 2379-190X |
| On-line prístup: | Získať plný text |
| Tagy: |
Pridať tag
Žiadne tagy, Buďte prvý, kto otaguje tento záznam!
|
| Abstract | Over the past years, widespread use of applications based on 3D image processing has increased rapidly. It is being employed in various fields, such as research, medicine and automation. Plenoptic camera system is used to capture light-field that can be exploited to estimate the 3D depth of the scene. The respective algorithms consist of a large number of computation-intensive instructions. It eventually leads to the problem of large execution time of the algorithm. Moreover, they require substantial amount of memory cells for the storage of intermediate and final results. Desktop GPU based solutions are power intensive and therefore cannot be used in the mobile applications with low energy requirements. The idea presented in this paper is to use the FPGA based hardware design to improve the performance of a 3D depth estimation algorithm by utilizing the advantage of concurrent execution. The algorithm is implemented, evaluated and the results show that FPGA design reduces the respective execution time significantly. |
|---|---|
| AbstractList | Over the past years, widespread use of applications based on 3D image processing has increased rapidly. It is being employed in various fields, such as research, medicine and automation. Plenoptic camera system is used to capture light-field that can be exploited to estimate the 3D depth of the scene. The respective algorithms consist of a large number of computation-intensive instructions. It eventually leads to the problem of large execution time of the algorithm. Moreover, they require substantial amount of memory cells for the storage of intermediate and final results. Desktop GPU based solutions are power intensive and therefore cannot be used in the mobile applications with low energy requirements. The idea presented in this paper is to use the FPGA based hardware design to improve the performance of a 3D depth estimation algorithm by utilizing the advantage of concurrent execution. The algorithm is implemented, evaluated and the results show that FPGA design reduces the respective execution time significantly. |
| Author | Greiner, Thomas Bhatti, Faraz |
| Author_xml | – sequence: 1 givenname: Faraz surname: Bhatti fullname: Bhatti, Faraz organization: Pforzheim University,Pforzheim,Germany – sequence: 2 givenname: Thomas surname: Greiner fullname: Greiner, Thomas organization: Pforzheim University,Pforzheim,Germany |
| BookMark | eNotkF1LwzAYhaMouM39Am_yBzrfJG3TXJbNfcDEwiZ4N9L0TY20TUkL4r-34q4O57l4OJw5uet8h4RQBivGQD0f1vnpVAglebbiwNlKxSxOFdyQpZIZmzCTKSTJLZlxIVXEFHw8kPkwfAFAJuNsRi7bYpfTvQ7Vtw5INzi4uqPWB1o02Pl-dIaKDT20ukZaBG9wGFxX07ypfXDjZ0vPOtQ4_jFNX33pGqR53zfO6NH57pHcW90MuLzmgrxvX87rfXR8203zj5HjIMbIakyVUVLwEtNUJQgZMh5nokJjrJUCRGIw0VbYuLQxKCFtxdGwqpRlOtUFefr3OkS89MG1Ovxcrn-IX3AbWAY |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IH CBEJK RIE RIO |
| DOI | 10.1109/ICASSP39728.2021.9414690 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Proceedings Order Plan (POP) 1998-present by volume IEEE Xplore All Conference Proceedings IEEE/IET Electronic Library (IEL) (UW System Shared) IEEE Proceedings Order Plans (POP) 1998-present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering |
| EISBN | 9781728176055 1728176050 |
| EISSN | 2379-190X |
| EndPage | 7867 |
| ExternalDocumentID | 9414690 |
| Genre | orig-research |
| GroupedDBID | 23M 6IE 6IF 6IH 6IK 6IL 6IM 6IN AAJGR AAWTH ABLEC ACGFS ADZIZ ALMA_UNASSIGNED_HOLDINGS BEFXN BFFAM BGNUA BKEBE BPEOZ CBEJK CHZPO IEGSK IJVOP IPLJI M43 OCL RIE RIL RIO RNS |
| ID | FETCH-LOGICAL-i203t-fae69c9732be6695e08e12483deccff73035ce5af3f4bf40937fd2ec1db7b6093 |
| IEDL.DBID | RIE |
| ISICitedReferencesCount | 2 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000704288408029&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| IngestDate | Wed Aug 27 02:24:59 EDT 2025 |
| IsPeerReviewed | false |
| IsScholarly | true |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-i203t-fae69c9732be6695e08e12483deccff73035ce5af3f4bf40937fd2ec1db7b6093 |
| PageCount | 5 |
| ParticipantIDs | ieee_primary_9414690 |
| PublicationCentury | 2000 |
| PublicationDate | 2021-June-6 |
| PublicationDateYYYYMMDD | 2021-06-06 |
| PublicationDate_xml | – month: 06 year: 2021 text: 2021-June-6 day: 06 |
| PublicationDecade | 2020 |
| PublicationTitle | Proceedings of the ... IEEE International Conference on Acoustics, Speech and Signal Processing (1998) |
| PublicationTitleAbbrev | ICASSP |
| PublicationYear | 2021 |
| Publisher | IEEE |
| Publisher_xml | – name: IEEE |
| SSID | ssj0008748 |
| Score | 2.1821067 |
| Snippet | Over the past years, widespread use of applications based on 3D image processing has increased rapidly. It is being employed in various fields, such as... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 7863 |
| SubjectTerms | 3D image processing Cameras Estimation FPGA hardware and optimizations Graphics processing units Hardware Image processing light-field camera Plenoptic camera Signal processing algorithms Three-dimensional displays |
| Title | FPGA Hardware Design for Plenoptic 3D Image Processing Algorithm Targeting a Mobile Application |
| URI | https://ieeexplore.ieee.org/document/9414690 |
| WOSCitedRecordID | wos000704288408029&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LTwIxEG6AeNCLDzC-04NHF_b9OG5AlETJJqDhRvqYKgmwZl307zstK2jixVvbZLJJJzvf1843U0KuE00TkIlYAI6yfCTIFnNcsGRgu2Arxlxzlf38EA2H8WSSZDVys6mFAQAjPoO2HppcvszFSl-VdRLf0ae5OqlHUbiu1dpE3Tjy42-ljp10Bt10NMoQbF2t33KddmX76xEVgyH9_f99_YC0tsV4NNvAzCGpwfKI7P3oI9gk0352l1KdhP9kBdCeUWVQpKNUS91zjAqCej06WGDwoFVpABrSdP6SF7PydUHHRhCu1xh9zDmGCppuU9st8tS_HXfvrerlBGvm2l5pKQZhInQjHg5hmARgx4BAHnsSPaYU_tVeICBgylM-V3jE8yIlXRCO5BEPcXpMGst8CSeEKumrgCdcOrbwBfLFQDKEMMWRaaC9d0qaequmb-vmGNNql87-Xj4nu9obRmsVXpBGWazgkuyIj3L2XlwZj34Bxt-ieA |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LT8JAEN4gmqgXH2B8uwePFvp-HBsQIQJpAhpuze52VkmEmgr6951dK2jixVu7yaTJTjrftzvfzBByHSmagEzEALCk4SJBNphlg5F5pg2mZMzWV9mP_WA4DCeTKKmQm1UtDABo8Rk01KPO5We5WKqrsmbkWuo0t0E21eSsslprFXfDwA2_tTpm1Oy14tEoQbi1lYLLthql9a8xKhpFOnv_-_4-qa_L8WiyApoDUoH5Idn90UmwRtJOchdTlYb_YAXQttZlUCSkVIndc4wLgjpt2pth-KBlcQAa0vjlKS-mi-cZHWtJuFpjdJBzDBY0Xie36-ShcztudY1ydoIxtU1nYUgGfiRUKx4Ovh95YIaAUB46GfpMSvyvHU-Ax6QjXS7xkOcEMrNBWBkPuI-vR6Q6z-dwTKjMXOnxiGeWKVyBjNHLGIKY5Mg10N45ITW1VenrV3uMtNyl07-Xr8h2dzzop_3e8P6M7CjPaOWVf06qi2IJF2RLvC-mb8Wl9u4naz2lwQ |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Proceedings+of+the+...+IEEE+International+Conference+on+Acoustics%2C+Speech+and+Signal+Processing+%281998%29&rft.atitle=FPGA+Hardware+Design+for+Plenoptic+3D+Image+Processing+Algorithm+Targeting+a+Mobile+Application&rft.au=Bhatti%2C+Faraz&rft.au=Greiner%2C+Thomas&rft.date=2021-06-06&rft.pub=IEEE&rft.eissn=2379-190X&rft.spage=7863&rft.epage=7867&rft_id=info:doi/10.1109%2FICASSP39728.2021.9414690&rft.externalDocID=9414690 |