FSCHOL: An OpenCL-based HPC Framework for Accelerating Sparse Cholesky Factorization on FPGAs

The proposed FSCHOL framework consists of an FPGA kernel implementing a throughput-optimized hardware architecture for accelerating the supernodal multifrontal algorithm for sparse Cholesky factorization and a host program implementing a novel scheduling algorithm for finding the optimal execution o...

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Bibliographic Details
Published in:Proceedings (Symposium on Computer Architecture and High Performance Computing) pp. 209 - 220
Main Authors: Tavakoli, Erfan Bank, Riera, Michael, Quraishi, Masudul Hassan, Ren, Fengbo
Format: Conference Proceeding
Language:English
Published: IEEE 01.10.2021
Subjects:
Cholesky factorization
Energy consumption
FPGA
Graphics processing units
high-performance computing
OpenCL
Power capacitors
Random access memory
reconfigurable computing
Scheduling algorithms
Sparse matrices
sparse matrix decomposition
System-on-chip
ISSN:2643-3001
Online Access:Get full text
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Summary:The proposed FSCHOL framework consists of an FPGA kernel implementing a throughput-optimized hardware architecture for accelerating the supernodal multifrontal algorithm for sparse Cholesky factorization and a host program implementing a novel scheduling algorithm for finding the optimal execution order of supernodes computations for an elimination tree on the FPGA to eliminate the need for off-chip memory access for storing intermediate results. Moreover, the proposed scheduling algorithm minimizes on-chip memory requirements for buffering intermediate results by resolving the dependency of parent nodes in an elimination tree through temporal parallelism. Experiment results for factorizing a set of sparse matrices in various sizes from SuiteSparse Matrix Collection show that the proposed FSCHOL implemented on an Intel Stratix 10 GX FPGA development board achieves on average 5.5× and 9.7× higher performance and 10.3× and 24.7× lower energy consumption than implementations of CHOLMOD on an Intel Xeon E5-2637 CPU and an NVIDIA V100 GPU, respectively.
ISSN:2643-3001
DOI:10.1109/SBAC-PAD53543.2021.00032