PRNGine: Massively Parallel Pseudo-Random Number Generation and Probability Distribution Approximations on AMD AI Engines
Generating large volumes of random numbers is essential for high-performance computing applications such as Monte Carlo simulations, machine learning, and dynamic game-play. Many of these applications require random number generation within a processing pipeline. Coarse-Grained Reconfigurable Archit...
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| Vydané v: | 2025 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) s. 91 - 98 |
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| Hlavní autori: | , |
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| Jazyk: | English |
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IEEE
03.06.2025
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| ISSN: | 2995-066X |
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| Abstract | Generating large volumes of random numbers is essential for high-performance computing applications such as Monte Carlo simulations, machine learning, and dynamic game-play. Many of these applications require random number generation within a processing pipeline. Coarse-Grained Reconfigurable Architectures (CGRAs) are well-suited for this task, enabling efficient dataflow-based distribution across processing elements. This work explores efficient random number generation on AMD AI Engines (AIEs) through two execution models: a co-processor model and a standalone dataflow accelerator model. Key challenges in porting Pseudo-Random Number Generators (PRNGs) to AIEs, including the lack of support for certain operations, unsigned data types, and efficient vectorization, are identified and overcome. Additionally, the challenges of approximating a normal distribution on AIEs are analyzed and addressed. Optimized implementations of essential PRNG operations are presented, demonstrating linear complexity and enabling scalable random number generation. Performance evaluation provides insights into the suitability of both execution models for various applications. |
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| AbstractList | Generating large volumes of random numbers is essential for high-performance computing applications such as Monte Carlo simulations, machine learning, and dynamic game-play. Many of these applications require random number generation within a processing pipeline. Coarse-Grained Reconfigurable Architectures (CGRAs) are well-suited for this task, enabling efficient dataflow-based distribution across processing elements. This work explores efficient random number generation on AMD AI Engines (AIEs) through two execution models: a co-processor model and a standalone dataflow accelerator model. Key challenges in porting Pseudo-Random Number Generators (PRNGs) to AIEs, including the lack of support for certain operations, unsigned data types, and efficient vectorization, are identified and overcome. Additionally, the challenges of approximating a normal distribution on AIEs are analyzed and addressed. Optimized implementations of essential PRNG operations are presented, demonstrating linear complexity and enabling scalable random number generation. Performance evaluation provides insights into the suitability of both execution models for various applications. |
| Author | Fahmy, Suhaib A. Bouaziz, Mohamed |
| Author_xml | – sequence: 1 givenname: Mohamed surname: Bouaziz fullname: Bouaziz, Mohamed email: mohamed.bouaziz@kaust.edu.sa organization: King Abdullah University of Science and Technology (KAUST),Thuwal,Saudi Arabia – sequence: 2 givenname: Suhaib A. surname: Fahmy fullname: Fahmy, Suhaib A. organization: King Abdullah University of Science and Technology (KAUST),Thuwal,Saudi Arabia |
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| Snippet | Generating large volumes of random numbers is essential for high-performance computing applications such as Monte Carlo simulations, machine learning, and... |
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| StartPage | 91 |
| SubjectTerms | AI Engine CGRA Dataflow Engines Generators High performance computing Machine learning Monte Carlo methods Performance evaluation Pipelines PRNG Probability distribution Random number generation Reconfigurable architectures |
| Title | PRNGine: Massively Parallel Pseudo-Random Number Generation and Probability Distribution Approximations on AMD AI Engines |
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