Logarithmic arithmetic as an alternative to floating-point: A review

The logarithmic number system (LNS) has found appeal in digital arithmetic because it allows multiplication and division to be performed much faster and more accurately than with the widely used floating-point (FP) number formats. We review the sign/logarithmic number system and present a comparison...

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Vydáno v:Conference record - Asilomar Conference on Signals, Systems, & Computers s. 1139 - 1143
Hlavní autoři: Chugh, Manik, Parhami, Behrooz
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 01.11.2013
Témata:
Accuracy
Adders
ALU design
computation errors
Computers
Europe
instruction-set architecture
interpolation
logarithmic number system
machine arithmetic
Microprocessors
Performance evaluation
performance per watt
Read only memory
real arithmetic
ISSN:1058-6393
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Shrnutí:The logarithmic number system (LNS) has found appeal in digital arithmetic because it allows multiplication and division to be performed much faster and more accurately than with the widely used floating-point (FP) number formats. We review the sign/logarithmic number system and present a comparison of various techniques and architectures for performing arithmetic operations efficiently in LNS. As a case study, we describe the European logarithmic microprocessor, a device built in the framework of a research project launched in 1999. Comparison of the arithmetic performance of this microprocessor with that of a commercial superscalar pipelined FP processor leads to the conclusion that LNS can be successfully deployed in general-purpose systems.
ISSN:1058-6393
DOI:10.1109/ACSSC.2013.6810472