Multi-BSP vs. BSP: A Case of Study for Dell AMD Multicores

Computer models have been used as a bridge between parallel algorithms and hardware architectures. The Bulk-Synchronous Parallel (BSP) is a well-known computing model originally devised for distributed algorithms running on clusters of single-core processors. The Multi-BSP model, that extends the cl...

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Bibliographic Details
Published in:Proceedings - Euromicro Workshop on Parallel and Distributed Processing pp. 579 - 587
Main Authors: Trabes, Guillermo, Gil-Costa, Veronica, Printista, Marcela, Marin, Mauricio
Format: Conference Proceeding
Language:English
Published: IEEE 01.03.2018
Subjects:
Adaptation models
bulk-synchronous parallel-BSP
Cache memory
Computational modeling
Dell multi-cores
Multi-BSP
Multicore processing
parallel computing models
Program processors
Random access memory
ISSN:2377-5750
Online Access:Get full text
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Summary:Computer models have been used as a bridge between parallel algorithms and hardware architectures. The Bulk-Synchronous Parallel (BSP) is a well-known computing model originally devised for distributed algorithms running on clusters of single-core processors. The Multi-BSP model, that extends the classic BSP model, was recently proposed for multi-core processors. However, this model -implemented through the MulticoreBSP-for-C library- presents some restrictions such as the explicit synchronizations between the cores, introducing some challenges on which the hardware characteristics should be taken into account to properly model the parallel algorithms. Therefore, we explore the suitability of these models for the Dell multi-core architecture. The objectives of this contribution are twofold. First, we model two different multi-core Dell architectures. Second, we show that a simple model with few parameters can be easily adapted to each Dell platform rather than complex models which tends to use tricky hardware parameters.
ISSN:2377-5750
DOI:10.1109/PDP2018.2018.00098