Enhancing symbolic system synthesis through ASPmT with partial assignment evaluation

The design of embedded systems is becoming continuously more complex such that efficient system-level design methods are becoming crucial. Recently, combined Answer Set Programming (ASP) and Quantifier Free Integer Difference Logic (QF-IDL) solving has been shown to be a promising approach in system...

Celý popis

Uloženo v:
Podrobná bibliografie
Vydáno v:Proceedings - Design, Automation, and Test in Europe Conference and Exhibition s. 306 - 309
Hlavní autoři: Neubauer, Kai, Wanko, Philipp, Schaub, Torsten, Haubelt, Christian
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: EDAA 01.03.2017
Témata:
Delays
Embedded systems
Encoding
Indexes
Routing
Schedules
ISSN:1558-1101
On-line přístup:Získat plný text
Tagy: Přidat tag
Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!
Popis
Shrnutí:The design of embedded systems is becoming continuously more complex such that efficient system-level design methods are becoming crucial. Recently, combined Answer Set Programming (ASP) and Quantifier Free Integer Difference Logic (QF-IDL) solving has been shown to be a promising approach in system synthesis. However, this approach still has several restrictions limiting its applicability. In the paper at hand, we propose a novel ASP modulo Theories (ASPmT) system synthesis approach, which (i) supports more sophisticated system models, (ii) tightly integrates the QF-IDL solving into the ASP solving, and (iii) makes use of partial assignment checking. As a result, more realistic systems are considered and an early exclusion of infeasible solutions improves the entire system synthesis.
ISSN:1558-1101
DOI:10.23919/DATE.2017.7927005