Enhancing symbolic system synthesis through ASPmT with partial assignment evaluation

The design of embedded systems is becoming continuously more complex such that efficient system-level design methods are becoming crucial. Recently, combined Answer Set Programming (ASP) and Quantifier Free Integer Difference Logic (QF-IDL) solving has been shown to be a promising approach in system...

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Vydané v:Proceedings - Design, Automation, and Test in Europe Conference and Exhibition s. 306 - 309
Hlavní autori: Neubauer, Kai, Wanko, Philipp, Schaub, Torsten, Haubelt, Christian
Médium: Konferenčný príspevok..
Jazyk:English
Vydavateľské údaje: EDAA 01.03.2017
Predmet:
Delays
Embedded systems
Encoding
Indexes
Routing
Schedules
ISSN:1558-1101
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Shrnutí:The design of embedded systems is becoming continuously more complex such that efficient system-level design methods are becoming crucial. Recently, combined Answer Set Programming (ASP) and Quantifier Free Integer Difference Logic (QF-IDL) solving has been shown to be a promising approach in system synthesis. However, this approach still has several restrictions limiting its applicability. In the paper at hand, we propose a novel ASP modulo Theories (ASPmT) system synthesis approach, which (i) supports more sophisticated system models, (ii) tightly integrates the QF-IDL solving into the ASP solving, and (iii) makes use of partial assignment checking. As a result, more realistic systems are considered and an early exclusion of infeasible solutions improves the entire system synthesis.
ISSN:1558-1101
DOI:10.23919/DATE.2017.7927005