An algorithm driven architecture for a lossless image compression scheme based on multiplicative autoregressive models

We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation...

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Bibliographic Details
Published in:Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems pp. 395 - 398
Main Authors: Chande, S.B., Das, M., Ganesan, S.
Format: Conference Proceeding
Language:English
Published: IEEE 1998
Subjects:
Algorithm design and analysis
Compression algorithms
Computational complexity
Computer architecture
Computer science
Hardware
Image coding
Parallel architectures
Systems engineering and theory
Transform coding
ISBN:9780818689147, 0818689145
Online Access:Get full text
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Description
Summary:We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation of the compression algorithm.
ISBN:9780818689147
0818689145
DOI:10.1109/MWSCAS.1998.759514