An algorithm driven architecture for a lossless image compression scheme based on multiplicative autoregressive models
We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation...
Uloženo v:
| Vydáno v: | Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems s. 395 - 398 |
|---|---|
| Hlavní autoři: | , , |
| Médium: | Konferenční příspěvek |
| Jazyk: | angličtina |
| Vydáno: |
IEEE
1998
|
| Témata: | |
| ISBN: | 9780818689147, 0818689145 |
| On-line přístup: | Získat plný text |
| Tagy: |
Přidat tag
Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!
|
| Abstract | We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation of the compression algorithm. |
|---|---|
| AbstractList | We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation of the compression algorithm. |
| Author | Chande, S.B. Das, M. Ganesan, S. |
| Author_xml | – sequence: 1 givenname: S.B. surname: Chande fullname: Chande, S.B. organization: Dept. of Comput. Sci. & Eng., Oakland Univ., Rochester, MI, USA – sequence: 2 givenname: M. surname: Das fullname: Das, M. – sequence: 3 givenname: S. surname: Ganesan fullname: Ganesan, S. |
| BookMark | eNotkNtKAzEQhgMqqLUv0Ku8QGuym-NlKR4KFS-qeFmyybSNZDclyRZ8e4N1bobv5-djmHt0PcQBEJpRsqCU6Me3r-1quV1QrdVCcs0pu0JTLRVRVAmlKZO3aJrzN6nDeENIe4fOywGbcIjJl2OPXfJnqEGyR1_AljEB3seEDQ4x5wA5Y9-bA2Ab-1Oq6OOAsz1CD7gzGRyu3I-h-FPw1pRqw2YsMcHhr12xjw5CfkA3exMyTP_3BH0-P32sXueb95f1armZeypZmTfAgTJOhYNOdoxbTXmjDVGgleuIJcIwoQ1XTaulkcwJ3Yk9o66RTlpB2wmaXbweAHanVK9PP7vLc9pfB75fUQ |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IH CBEJK RIE RIO |
| DOI | 10.1109/MWSCAS.1998.759514 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Proceedings Order Plan (POP) 1998-present by volume IEEE Xplore All Conference Proceedings IEEE Xplore IEEE Proceedings Order Plans (POP) 1998-present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Xplore url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Computer Science |
| EndPage | 398 |
| ExternalDocumentID | 759514 |
| GroupedDBID | 6IE 6IH 6IK 6IL AAJGR AAWTH ACGHX ALMA_UNASSIGNED_HOLDINGS BEFXN BFFAM BGNUA BKEBE BPEOZ CBEJK OCL RIB RIC RIE RIL RIO |
| ID | FETCH-LOGICAL-i174t-2e5e14516deb7b45c91529a08e98db0c06a469a582397a74d69b6f41d27d7c613 |
| IEDL.DBID | RIE |
| ISBN | 9780818689147 0818689145 |
| ISICitedReferencesCount | 0 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000079563200090&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| IngestDate | Tue Aug 26 17:57:35 EDT 2025 |
| IsPeerReviewed | false |
| IsScholarly | true |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-i174t-2e5e14516deb7b45c91529a08e98db0c06a469a582397a74d69b6f41d27d7c613 |
| PageCount | 4 |
| ParticipantIDs | ieee_primary_759514 |
| PublicationCentury | 1900 |
| PublicationDate | 19980000 |
| PublicationDateYYYYMMDD | 1998-01-01 |
| PublicationDate_xml | – year: 1998 text: 19980000 |
| PublicationDecade | 1990 |
| PublicationTitle | Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems |
| PublicationTitleAbbrev | MWSCAS |
| PublicationYear | 1998 |
| Publisher | IEEE |
| Publisher_xml | – name: IEEE |
| SSID | ssj0000452003 |
| Score | 1.4195517 |
| Snippet | We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 395 |
| SubjectTerms | Algorithm design and analysis Compression algorithms Computational complexity Computer architecture Computer science Hardware Image coding Parallel architectures Systems engineering and theory Transform coding |
| Title | An algorithm driven architecture for a lossless image compression scheme based on multiplicative autoregressive models |
| URI | https://ieeexplore.ieee.org/document/759514 |
| WOSCitedRecordID | wos000079563200090&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NT8JAEN2I8eAJRYzfmYPXQlu23d0jIRIPSkjQyI1su1MlgWJK4fc7uy2oiRdvnR6aZrM7b2Z23hvG7kNtAoEy85DQ1eO6F3pJL0g9bXMgJbkJEkcUfhKjkZxO1bjW2XZcGER0zWfYsY_uLt-s0o0tlXVFRPEAb7CGEHFF1dqXU6wyOG1Qp_BoFeBVwKNaX2dnix1nxlfd57fJoD-xVD3Zqb76a7qKA5dh81-_dcLa3yQ9GO_h55QdYN5izd2UBqgP7Rnb9nPQi_dVMS8_lmAK697g5_0BUNwKGhYElwvyezBfko8B22te9cjmQBkwLhEs4hkgu-5CdOW-LYK2OgjoEndruuE66zZ7HT68DB69etqCN6espPRCjNCN7TWYiIRHqSJoV9qXqKRJ_NSPNaXSOpIhhTBacBOrJM54YEJhREpRwTk7zFc5XjDgkuIENDHBY4_7WiSZ0BSa6CzzM4x0fMladhVnn5WgxqxawKs_316z44oGaKseN-ywLDZ4y47SbTlfF3duE3wBmaix2A |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3fT8IwEG4UTfQJRYy_7YOvg210a_tIiEQjEBIw8ka69aZLYBgY_P1eu4Ga-OLbbg_L0rT33V3v-46QB19pj4NIHEB0dZhq-U7U8mJHmRxICqa9yBKFe3wwEJOJHJY625YLAwC2-Qwa5tHe5etFvDalsiYPMB5g--QgYMx3C7LWrqBitMFxi1qNR6MBLz0WlAo7W5tvWTOubPbfRp32yJD1RKP47q_5KhZeutV__dgJqX_T9OhwB0CnZA-yGqlu5zTQ8tiekU07o2r2vlim-cec6qVxcPTnDQLFyJUqOkPAnKHno-kcvQw13eZFl2xGMQeGOVCDeZqiXfYh2oLfBqgySghgU3dj2vE6qzp57T6OO09OOW_BSTEvyR0fArCDezVEPGJBLBHcpXIFSKEjN3ZDhcm0CoSPQYziTIcyChPmaZ9rHmNccE4q2SKDC0KZwEgBdIgA2WKu4lHCFQYnKkncBAIVXpKaWcXpZyGpMS0W8OrPt_fk6Gnc7017z4OXa3JckAJNDeSGVPLlGm7JYbzJ09Xyzm6ILwUptR8 |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Circuits+and+Systems%3B+Proceedings%3A+Midwest+Symposium+on+Circuits+and+Systems&rft.atitle=An+algorithm+driven+architecture+for+a+lossless+image+compression+scheme+based+on+multiplicative+autoregressive+models&rft.au=Chande%2C+S.B.&rft.au=Das%2C+M.&rft.au=Ganesan%2C+S.&rft.date=1998-01-01&rft.pub=IEEE&rft.isbn=9780818689147&rft.spage=395&rft.epage=398&rft_id=info:doi/10.1109%2FMWSCAS.1998.759514&rft.externalDocID=759514 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780818689147/lc.gif&client=summon&freeimage=true |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780818689147/mc.gif&client=summon&freeimage=true |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780818689147/sc.gif&client=summon&freeimage=true |

