A global code scheduling technique using guarded PDG

For instruction-level parallel machines, it is essential to extract parallelly executable instructions from a program by code scheduling. In this paper, we propose a new code scheduling technique using an extension of PDG. This technique parallelizes non-numerical programs, producing better machine...

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Vydáno v:IEEE First ICA³PP, IEEE First International Conference on Algorithms and Architectures for Parallel Processing, Brisbane, Australia, 19-21 April, 1995 Ročník 2; s. 661 - 669 vol.2
Hlavní autoři: Koseki, A., Komatsu, H., Fukazawa, Y.
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 01.01.1995
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ISBN:9780780320185, 0780320182
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Abstract For instruction-level parallel machines, it is essential to extract parallelly executable instructions from a program by code scheduling. In this paper, we propose a new code scheduling technique using an extension of PDG. This technique parallelizes non-numerical programs, producing better machine codes than these created by percolation scheduling.< >
AbstractList For instruction-level parallel machines, it is essential to extract parallelly executable instructions from a program by code scheduling. In this paper, we propose a new code scheduling technique using an extension of PDG. This technique parallelizes non-numerical programs, producing better machine codes than these created by percolation scheduling.< >
Author Koseki, A.
Fukazawa, Y.
Komatsu, H.
Author_xml – sequence: 1
  givenname: A.
  surname: Koseki
  fullname: Koseki, A.
  organization: Sch. of Sci. & Eng., Waseda Univ., Tokyo, Japan
– sequence: 2
  givenname: H.
  surname: Komatsu
  fullname: Komatsu, H.
  organization: Sch. of Sci. & Eng., Waseda Univ., Tokyo, Japan
– sequence: 3
  givenname: Y.
  surname: Fukazawa
  fullname: Fukazawa, Y.
BookMark eNotT8tOwzAQtARIQJsPgJN_IMHv2MeqQItUiRzouXK86zQoJBA3B_6eVGU10mjmMDN7T677oUdCHjgrOGfu6W29qqqCO6cLVQqh5RXJXGnZDCkYt_qWZCl9svmU5pKpO6JWtOmG2nc0DIA0hSPC1LV9Q08Yjn37MyGd0lk3kx8BgVbPmyW5ib5LmP3zguxfXz7W23z3vpk37PKWl-yUg0KGxsxdMQShjA0MoqtnV5rScmBcei94OC8DGY0AUwvrXdQAAYSSC_J4yW0R8fA9tl9-_D1cXpN_sz1EzQ
ContentType Conference Proceeding
DBID 6IE
6IL
CBEJK
RIE
RIL
DOI 10.1109/ICAPP.1995.472253
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP All) 1998-Present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Computer Science
EndPage 669 vol.2
ExternalDocumentID 472253
GroupedDBID 6IE
6IK
6IL
AAJGR
AAWTH
ACGHX
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
OCL
RIE
RIL
ID FETCH-LOGICAL-i170t-d4e0e66045fcc2468c0df9b4e036781d013aa21c0185d3f62d6b28a9f5ddcd243
IEDL.DBID RIE
ISBN 9780780320185
0780320182
ISICitedReferencesCount 0
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=472253&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
IngestDate Tue Aug 26 23:24:11 EDT 2025
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-i170t-d4e0e66045fcc2468c0df9b4e036781d013aa21c0185d3f62d6b28a9f5ddcd243
ParticipantIDs ieee_primary_472253
PublicationCentury 1900
PublicationDate 1995-01-01
PublicationDateYYYYMMDD 1995-01-01
PublicationDate_xml – month: 01
  year: 1995
  text: 1995-01-01
  day: 01
PublicationDecade 1990
PublicationTitle IEEE First ICA³PP, IEEE First International Conference on Algorithms and Architectures for Parallel Processing, Brisbane, Australia, 19-21 April, 1995
PublicationTitleAbbrev ICAPP
PublicationYear 1995
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssj0000451304
Score 1.2356864
Snippet For instruction-level parallel machines, it is essential to extract parallelly executable instructions from a program by code scheduling. In this paper, we...
SourceID ieee
SourceType Publisher
StartPage 661
SubjectTerms Arithmetic
Computer aided instruction
Concurrent computing
Dynamic scheduling
Laboratories
Processor scheduling
Title A global code scheduling technique using guarded PDG
URI https://ieeexplore.ieee.org/document/472253
Volume 2
WOSCitedRecordID wos472253&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV27TsMwFLVoxcBUKEW85YHVbfyIHY9VocBSZQCpWxX72lWXFpWW78d20iAkFrbEg5Vc27oP33MOQg9WM8-5U4QarojgrCCV1Y5QKi3k2gqtTBKbULNZMZ_rsuHZTlgY51xqPnPD-Jju8mFj97FUNorEhjnvoI5SsoZqteWUSJMSMvOUmBdRFDzEzQ2_zuE9by41aaZHr5NxWUakXj6sJ_0lrpJ8y7T3r686RYMfjB4uW-9zho7cuo96B5EG3JzZcyTGuCb9wBG9jkMyG5xLxKDjlr4Vx-b3JV7G3eIAl4_PA_Q-fXqbvJBGKoGsqMp2BITLnJTBCt5aJmRhM_DahFEevBGFEOhVFaM2mgG4lwykYUWlfQ5ggQl-gbrrzdpdIpyBBmGY8SHQE7ai2hnNlNVeWu65hivUjzZYfNRsGIv696__HL1BJzUEPJYsblF3t927O3Rsv3arz-19WsFvoseXjQ
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NT8IwGH6jaKInFDF-24PXwfqxbj0SFCEi2QETbmT9IlyAIPj7bbuBMfHibeuh2d62eT_6Ps8D8KQEsZSaNMKSphGjJIsKJUyEMVc6EYqJVAaxiXQ0yiYTkVc82wELY4wJzWem5R_DXb5eqq0vlbU9sWFCD-EoYYzEJVhrX1DxRCkuNw-peeZlwV3kXDHs7N6T6loTx6I96Hby3GP1klY57S95leBdevV_fdcZNH9Qeijf-59zODCLBtR3Mg2oOrUXwDqopP1AHr-OXDrr3ItHoaM9gSvy7e8zNPP7xWiUP7824aP3Mu72o0osIZrjNN5EmpnYcO6sYJUijGcq1lZIN0qdP8LahXpFQbDyZtDUcqK5JFkhbKK10oTRS6gtlgtzBSjWQjNJpHWhHlMFFkYKkiphuaKWCn0NDW-D6arkw5iWv3_z5-gjnPTH78PpcDB6u4XTEhDuCxh3UNust-YejtXXZv65fgir-Q26O5rU
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=IEEE+First+ICA%C2%B3PP%2C+IEEE+First+International+Conference+on+Algorithms+and+Architectures+for+Parallel+Processing%2C+Brisbane%2C+Australia%2C+19-21+April%2C+1995&rft.atitle=A+global+code+scheduling+technique+using+guarded+PDG&rft.au=Koseki%2C+A.&rft.au=Komatsu%2C+H.&rft.au=Fukazawa%2C+Y.&rft.date=1995-01-01&rft.pub=IEEE&rft.isbn=9780780320185&rft.volume=2&rft.spage=661&rft.epage=669+vol.2&rft_id=info:doi/10.1109%2FICAPP.1995.472253&rft.externalDocID=472253
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780320185/lc.gif&client=summon&freeimage=true
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780320185/mc.gif&client=summon&freeimage=true
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780320185/sc.gif&client=summon&freeimage=true