A hardware architecture to deploy complex multiprocessor scheduling algorithms
An increasing demand for high-performance systems has been observed in the domain of both general purpose and real-time systems, pushing the industry towards a pervasive transition to multi-core platforms. Unfortunately, well-known and efficient scheduling results for single-core systems do not scal...
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| Published in: | IEEE Symposium on Embedded Systems for Real-Time Multimedia (Print) pp. 1 - 10 |
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| Main Authors: | , , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
01.08.2014
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| Subjects: | |
| ISSN: | 2325-1271 |
| Online Access: | Get full text |
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