Field programmable gate array (FPGA) implementation of novel complex PN-code-generator- based data scrambler and descrambler

A novel technique for the generation of complex and lengthy code sequences using low- length linear feedback shift registers (LFSRs) for data scrambling and descrambling is proposed. The scheme has been implemented using VHSIC hardware description language (VHDL) approach which allows the reconfigur...

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Bibliographic Details

Published in:	Maejo international journal of science and technology Vol. 4; no. 1; pp. 125 - 135
Main Author:	Shabir A. Parah
Format:	Journal Article
Language:	English
Published:	Maejo University 01.01.2010
Subjects:	complex code generator descrambler FPGA scrambler VHDL
ISSN:	1905-7873, 1905-7873
Online Access:	Get full text
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