Implementation of Face Recognition Algorithm on Fields Programmable Gate Array Card
The evolution of today's application technologies requires a certain level of robustness, reliability and ease of integration. We choose the Fields Programmable Gate Array (FPGA) hardware description language to implement the facial recognition algorithm based on "Eigen faces" using P...
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| Vydáno v: | Nashrīyah-i mudīrīyat-i fannāvarī-i iṭṭilāʻāt Ročník 12; číslo 2; s. 40 - 58 |
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| Hlavní autoři: | , , |
| Médium: | Journal Article |
| Jazyk: | angličtina |
| Vydáno: |
University of Tehran
01.06.2020
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| Témata: | |
| ISSN: | 2008-5893, 2423-5059 |
| On-line přístup: | Získat plný text |
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| Shrnutí: | The evolution of today's application technologies requires a certain level of robustness, reliability and ease of integration. We choose the Fields Programmable Gate Array (FPGA) hardware description language to implement the facial recognition algorithm based on "Eigen faces" using Principal Component Analysis. In this paper, we first present an overview of the PCA used for facial recognition, then use a VHSIC Hardware Description Language (VHDL) simulation and design platform, which is the ISE. We describe the operation of each block and implement, thereafter, the computation of the global centered images. This corresponds to the first step of the PCA algorithm to assess its performance. The comparison of the results of this implementation with that of MATLAB confirmed the operability and effectiveness of this method for centralizing images. We also implemented the last part of this algorithm which is the computation of the Manhattan distance. The tests have given very satisfactory results. |
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| ISSN: | 2008-5893 2423-5059 |
| DOI: | 10.22059/jitm.2020.75790 |