A New Stochastic Computing Methodology for Efficient Neural Network Implementation

This paper presents a new methodology for the hardware implementation of neural networks (NNs) based on probabilistic laws. The proposed encoding scheme circumvents the limitations of classical stochastic computing (based on unipolar or bipolar encoding) extending the representation range to any rea...

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Vydáno v:IEEE transaction on neural networks and learning systems Ročník 27; číslo 3; s. 551 - 564
Hlavní autoři: Canals, Vincent, Morro, Antoni, Oliver, Antoni, Alomar, Miquel L., Rossello, Josep L.
Médium: Journal Article
Jazyk:angličtina
Vydáno: United States IEEE 01.03.2016
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:
Artificial neural networks
Buildings
Computation
Computational intelligence
Encoding
Hardware
Logic gates
Mathematical functions
Mathematical models
Methodology
Neural networks
neural networks (NNs)
pattern recognition
Probabilistic logic
stochastic systems
Stochasticity
Switches
stochastic systems
neural networks (NNs)
probabilistic logic
Computational intelligence
pattern recognition
ISSN:2162-237X, 2162-2388, 2162-2388
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Shrnutí:This paper presents a new methodology for the hardware implementation of neural networks (NNs) based on probabilistic laws. The proposed encoding scheme circumvents the limitations of classical stochastic computing (based on unipolar or bipolar encoding) extending the representation range to any real number using the ratio of two bipolar-encoded pulsed signals. Furthermore, the novel approach presents practically a total noise-immunity capability due to its specific codification. We introduce different designs for building the fundamental blocks needed to implement NNs. The validity of the present approach is demonstrated through a regression and a pattern recognition task. The low cost of the methodology in terms of hardware, along with its capacity to implement complex mathematical functions (such as the hyperbolic tangent), allows its use for building highly reliable systems and parallel computing.
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ISSN:2162-237X
2162-2388
2162-2388
DOI:10.1109/TNNLS.2015.2413754