Parallel programming of an ionic floating-gate memory array for scalable neuromorphic computing

Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and readout of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10-nanoampere read currents are required for...

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Bibliographic Details
Published in:	Science (American Association for the Advancement of Science) Vol. 364; no. 6440; p. 570
Main Authors:	Fuller, Elliot J, Keene, Scott T, Melianas, Armantas, Wang, Zhongrui, Agarwal, Sapan, Li, Yiyang, Tuchman, Yaakov, James, Conrad D, Marinella, Matthew J, Yang, J Joshua, Salleo, Alberto, Talin, A Alec
Format:	Journal Article
Language:	English
Published:	United States 10.05.2019
ISSN:	1095-9203, 1095-9203
Online Access:	Get more information
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Summary:	Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and readout of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10-nanoampere read currents are required for learning that surpasses conventional computing efficiency. We introduce an ionic floating-gate memory array based on a polymer redox transistor connected to a conductive-bridge memory (CBM). Selective and linear programming of a redox transistor array is executed in parallel by overcoming the bridging threshold voltage of the CBMs. Synaptic weight readout with currents <10 nanoamperes is achieved by diluting the conductive polymer with an insulator to decrease the conductance. The redox transistors endure >1 billion write-read operations and support >1-megahertz write-read frequencies.
Bibliography:	ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23
ISSN:	1095-9203 1095-9203
DOI:	10.1126/science.aaw5581