Synergistic Dynamical Decoupling and Circuit Design for Enhanced Algorithm Performance on Near-Term Quantum Devices

Dynamical decoupling (DD) is a promising technique for mitigating errors in near-term quantum devices. However, its effectiveness depends on both hardware characteristics and algorithm implementation details. This paper explores the synergistic effects of dynamical decoupling and optimized circuit d...

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Vydané v:Entropy (Basel, Switzerland) Ročník 26; číslo 7; s. 586
Hlavní autori: Ji, Yanjun, Polian, Ilia
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: Switzerland MDPI AG 01.07.2024
Predmet:
Algorithms
Analysis
Approximation
Circuit design
Circuits
Computer industry
Decoupling
Design analysis
Design factors
Design optimization
Devices
dynamical decoupling
Effectiveness
Error analysis
Hardware
Impact analysis
Investment analysis
near-term quantum devices
Optimization techniques
quantum circuit design
quantum error mitigation
Software
Success
Synergistic effect
United States
Egypt
dynamical decoupling
quantum circuit design
near-term quantum devices
quantum error mitigation
ISSN:1099-4300, 1099-4300
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Shrnutí:Dynamical decoupling (DD) is a promising technique for mitigating errors in near-term quantum devices. However, its effectiveness depends on both hardware characteristics and algorithm implementation details. This paper explores the synergistic effects of dynamical decoupling and optimized circuit design in maximizing the performance and robustness of algorithms on near-term quantum devices. By utilizing eight IBM quantum devices, we analyze how hardware features and algorithm design impact the effectiveness of DD for error mitigation. Our analysis takes into account factors such as circuit fidelity, scheduling duration, and hardware-native gate set. We also examine the influence of algorithmic implementation details, including specific gate decompositions, DD sequences, and optimization levels. The results reveal an inverse relationship between the effectiveness of DD and the inherent performance of the algorithm. Furthermore, we emphasize the importance of gate directionality and circuit symmetry in improving performance. This study offers valuable insights for optimizing DD protocols and circuit designs, highlighting the significance of a holistic approach that leverages both hardware features and algorithm design for the high-quality and reliable execution of near-term quantum algorithms.
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ISSN:1099-4300
1099-4300
DOI:10.3390/e26070586