An Accelerator Design Using a MTCA Decomposition Algorithm for CNNs

Due to the high throughput and high computing capability of convolutional neural networks (CNNs), researchers are paying increasing attention to the design of CNNs hardware accelerator architecture. Accordingly, in this paper, we propose a block parallel computing algorithm based on the matrix trans...

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Bibliographic Details

Published in:	Sensors (Basel, Switzerland) Vol. 20; no. 19; p. 5558
Main Authors:	Zhao, Yunping, Lu, Jianzhuang, Chen, Xiaowen
Format:	Journal Article
Language:	English
Published:	Basel MDPI AG 28.09.2020 MDPI
Subjects:	Algorithms CNNs accelerator Efficiency Field programmable gate arrays hardware architecture parallel computing algorithm Software
ISSN:	1424-8220, 1424-8220
Online Access:	Get full text
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