An Accelerator Design Using a MTCA Decomposition Algorithm for CNNs

Due to the high throughput and high computing capability of convolutional neural networks (CNNs), researchers are paying increasing attention to the design of CNNs hardware accelerator architecture. Accordingly, in this paper, we propose a block parallel computing algorithm based on the matrix trans...

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Vydané v:	Sensors (Basel, Switzerland) Ročník 20; číslo 19; s. 5558
Hlavní autori:	Zhao, Yunping, Lu, Jianzhuang, Chen, Xiaowen
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	Basel MDPI AG 28.09.2020 MDPI
Predmet:	Algorithms CNNs accelerator Efficiency Field programmable gate arrays hardware architecture parallel computing algorithm Software
ISSN:	1424-8220, 1424-8220
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