Novel digital NGD Methodology for FPGA-based Embedded Systems

Negative Group Delay (NGD) is a concept not widely explored in embedded digital signal processing systems, and this study aims to fill this gap. It presents a novel methodology for implementing NGD using second-order Finite Impulse Response (FIR) filter. We include synthesis results that prove the v...

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Vydáno v:	IEEE access Ročník 12; s. 1
Hlavní autoři:	Randriatsiferana, Rivo, Lorandel, Jordane, Salvador, Ruben, Moy, Christophe
Médium:	Journal Article
Jazyk:	angličtina
Vydáno:	Piscataway IEEE 01.01.2024 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:	Circuits Cross correlation Cutoff frequency Delays Digital NGD design Digital signal processing Embedded systems Engineering Sciences Field programmable gate arrays Finite impulse response filters FIR filters FIR-Based NGD Group delay Methodology NGD FPGA NGD implementation Signal Processing Time domain analysis Time-frequency analysis Waveforms Time-frequency analysis Finite impulse response filters Cutoff frequency Circuits Digital signal processing Delays Field programmable gate arrays
ISSN:	2169-3536, 2169-3536
On-line přístup:	Získat plný text
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