Fast minimum loss space vector pulse-width modulation algorithm for multilevel inverters

This study focuses on developing fast, easily implementable minimum loss space vector pulse-width modulation (PWM) algorithms for three-level inverters that can work through extended region of operation into over modulation. A unique way of duty cycle limitation for the maximum dc bus utilisation an...

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Veröffentlicht in:	IET power electronics Jg. 7; H. 6; S. 1590 - 1602
Hauptverfasser:	Sozer, Yilmaz, Torrey, David A, Saha, Aparna, Nguyen, Hung, Hawes, Nathaniel
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	Stevenage The Institution of Engineering and Technology 01.06.2014 The Institution of Engineering & Technology
Schlagworte:	duty cycle limitation embedded controllers fast minimum loss space vector pulse‐width modulation algorithm grid interactive inverter Matlab‐Simulink environment maximum DC bus utilisation minimum cycle time minimum loss space vector PWM algorithm multilevel inverters power grids PWM invertors renewable energy application three‐level inverters maximum DC bus utilisation embedded controllers Matlab-Simulink environment grid interactive inverter renewable energy application multilevel inverters three-level inverters PWM invertors duty cycle limitation minimum loss space vector PWM algorithm fast minimum loss space vector pulse-width modulation algorithm power grids minimum cycle time
ISSN:	1755-4535, 1755-4543
Online-Zugang:	Volltext
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