Smart Containers and Skeleton Programming for GPU-Based Systems

In this paper, we discuss the role, design and implementation of smart containers in the SkePU skeleton library for GPU-based systems. These containers provide an interface similar to C++ STL containers but internally perform runtime optimization of data transfers and runtime memory management for t...

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Vydáno v:International journal of parallel programming Ročník 44; číslo 3; s. 506 - 530
Hlavní autoři: Dastgeer, Usman, Kessler, Christoph
Médium: Journal Article
Jazyk:angličtina
Vydáno: New York Springer US 01.06.2016
Springer Nature B.V
Témata:
Analysis
C plus plus
Communication
Computer memory
Computer programming
Computer Science
Consistency
Containers
Design engineering
Interfaces
Libraries
Memory management
Optimization
Processor Architectures
Programming
Run time (computers)
Software Engineering/Programming and Operating Systems
Studies
Synchronization
Theory of Computation
SkePU
Skeleton programming
Memory management
Smart containers
Runtime optimizations
GPU-based systems
ISSN:0885-7458, 1573-7640, 1573-7640
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Shrnutí:In this paper, we discuss the role, design and implementation of smart containers in the SkePU skeleton library for GPU-based systems. These containers provide an interface similar to C++ STL containers but internally perform runtime optimization of data transfers and runtime memory management for their operand data on the different memory units. We discuss how these containers can help in achieving asynchronous execution for skeleton calls while providing implicit synchronization capabilities in a data consistent manner. Furthermore, we discuss the limitations of the original, already optimizing memory management mechanism implemented in SkePU containers, and propose and implement a new mechanism that provides stronger data consistency and improves performance by reducing communication and memory allocations. With several applications, we show that our new mechanism can achieve significantly (up to 33.4 times) better performance than the initial mechanism for page-locked memory on a multi-GPU based system.
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ISSN:0885-7458
1573-7640
1573-7640
DOI:10.1007/s10766-015-0357-6