Advancing Global Pose Refinement: A Linear, Parameter-Free Model for Closed Circuits via Quaternion Interpolation

Global pose refinement is a significant challenge within Simultaneous Localization and Mapping (SLAM) frameworks. For LIDAR-based SLAM systems, pose refinement is integral to correcting drift caused by the successive registration of 3D point clouds collected by the sensor. A divergence between the a...

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Published in:Sensors (Basel, Switzerland) Vol. 24; no. 16; p. 5112
Main Authors: Benevides, Rubens Antônio Leite, dos Santos, Daniel Rodrigues, Pavan, Nadisson Luis, Veiga, Luis Augusto Koenig
Format: Journal Article
Language:English
Published: Switzerland MDPI AG 07.08.2024
MDPI
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ISSN:1424-8220, 1424-8220
Online Access:Get full text
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Summary:Global pose refinement is a significant challenge within Simultaneous Localization and Mapping (SLAM) frameworks. For LIDAR-based SLAM systems, pose refinement is integral to correcting drift caused by the successive registration of 3D point clouds collected by the sensor. A divergence between the actual and calculated platform paths characterizes this error. In response to this challenge, we propose a linear, parameter-free model that uses a closed circuit for global trajectory corrections. Our model maps rotations to quaternions and uses Spherical Linear Interpolation (SLERP) for transitions between them. The intervals are established by the constraint set by the Least Squares (LS) method on rotation closure and are proportional to the circuit’s size. Translations are globally adjusted in a distinct linear phase. Additionally, we suggest a coarse-to-fine pairwise registration method, integrating Fast Global Registration and Generalized ICP with multiscale sampling and filtering. The proposed approach is tested on three varied datasets of point clouds, including Mobile Laser Scanners and Terrestrial Laser Scanners. These diverse datasets affirm the model’s effectiveness in 3D pose estimation, with substantial pose differences and efficient pose optimization in larger circuits.
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ISSN:1424-8220
1424-8220
DOI:10.3390/s24165112