High Efficiency Architecture Design of Real-Time QFHD for H.264/AVC Fast Block Motion Estimation

Motion estimation (ME) in the MPEG-4 AVC/JVT/H.264 video coding standard employs seven permitted block sizes to improve the rate-distortion performance. This novel feature achieves significant coding gain over coding a macroblock using the fixed block size. However, ME is computationally intensive w...

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Vydáno v:IEEE transactions on circuits and systems for video technology Ročník 21; číslo 11; s. 1646 - 1658
Hlavní autoři: TSAI, Tsung-Han, PAN, Yu-Nan
Médium: Journal Article
Jazyk:angličtina
Vydáno: New York, NY IEEE 01.11.2011
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:
Algorithm design and analysis
Algorithms
Applied sciences
Architecture
Arrays
Blocking
Broadcasting. Videocommunications. Audiovisual
Coding
Coding standards
Detection, estimation, filtering, equalization, prediction
Electronics
Exact sciences and technology
Fast block matching algorithm
H264
high efficiency architecture
Image edge detection
Image processing
Imaging devices
Information, signal and communications theory
Mathematical analysis
Motion estimation
Pixel
Prediction algorithms
QFHD
Real time
Searching
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal and communications theory
Signal processing
Signal, noise
Specifications
Studies
Telecommunications
Telecommunications and information theory
Television
Video coding
Performance evaluation
High resolution
Motion estimation
Image processing
H.264
Rate distortion theory
Specification
Fast block matching algorithm
Low frequency
Video signal processing
Block matching
Degradation
high
Operating rate
Television
QFHD
Analytical method
Signal processing
efficiency architecture
Fast algorithm
Gain
Damaging
Signal to noise ratio
ISSN:1051-8215, 1558-2205
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Shrnutí:Motion estimation (ME) in the MPEG-4 AVC/JVT/H.264 video coding standard employs seven permitted block sizes to improve the rate-distortion performance. This novel feature achieves significant coding gain over coding a macroblock using the fixed block size. However, ME is computationally intensive with the complexity increasing linearly with the number of the allowed block sizes. This paper presents an architecture for a combined fast ME algorithm with the predict hexagon search (PHS) and the edge information mode decision (EIMD). The EIMD algorithm utilizes edge information to predict the best block size quickly and precisely. The PHS algorithm searches the best motion vector efficiently. The analytical results reveal that the EIMD+PHS algorithm is 2.4-25 times faster than other popular fast ME algorithms. Additionally, the EIMD+PHS algorithm is 600-2000 times faster than JM10.2, and the peak signal-to-noise ratio degradation is less than 0.15 dB. The proposed architecture applies a large search range and low operation frequency as compared with other popular ME architectures. The proposed architecture only needs 19.4 MHz operating frequency to achieve real-time execution for the general specification of the standard-definition television (720 × 480) used with four reference frames and the search range of 256 × 256. The proposed architecture only requires 116.6 MHz operating frequency to achieve real-time execution for the ultrahigh specification of the quad full high definition (3840 × 2160) used with one reference frame and the search range of 256 × 256. The gate count of the proposed architecture is 300 K, and the memory usage is 12.6 kB.
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ISSN:1051-8215
1558-2205
DOI:10.1109/TCSVT.2011.2133230