At, N., Beuchat, J., Okamoto, E., San, I., & Yamazaki, T. (2017). A low-area unified hardware architecture for the AES and the cryptographic hash function Grøstl. Journal of Parallel and Distributed Computing, 106, 106-120. https://doi.org/10.1016/j.jpdc.2017.01.029
Chicago Style (17th ed.) CitationAt, Nuray, Jean-Luc Beuchat, Eiji Okamoto, Ismail San, and Teppei Yamazaki. "A Low-area Unified Hardware Architecture for the AES and the Cryptographic Hash Function Grøstl." Journal of Parallel and Distributed Computing 106 (2017): 106-120. https://doi.org/10.1016/j.jpdc.2017.01.029.
MLA (9th ed.) CitationAt, Nuray, et al. "A Low-area Unified Hardware Architecture for the AES and the Cryptographic Hash Function Grøstl." Journal of Parallel and Distributed Computing, vol. 106, 2017, pp. 106-120, https://doi.org/10.1016/j.jpdc.2017.01.029.