Block-LDPC: a practical LDPC coding system design approach

This paper presents a joint low-density parity-check (LDPC) code-encoder-decoder design approach, called Block-LDPC, for practical LDPC coding system implementations. The key idea is to construct LDPC codes subject to certain hardware-oriented constraints that ensure the effective encoder and decode...

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Vydáno v:IEEE transactions on circuits and systems. I, Regular papers Ročník 52; číslo 4; s. 766 - 775
Hlavní autoři: Zhong, Hao, Zhang, Tong
Médium: Journal Article
Jazyk:angličtina
Vydáno: New York IEEE 01.04.2005
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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ISSN:1549-8328, 1558-0806
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Shrnutí:This paper presents a joint low-density parity-check (LDPC) code-encoder-decoder design approach, called Block-LDPC, for practical LDPC coding system implementations. The key idea is to construct LDPC codes subject to certain hardware-oriented constraints that ensure the effective encoder and decoder hardware implementations. We develop a set of hardware-oriented constraints, subject to which a semi-random approach is used to construct Block-LDPC codes with good error-correcting performance. Correspondingly, we develop an efficient encoding strategy and a pipelined partially parallel Block-LDPC encoder architecture, and a partially parallel Block-LDPC decoder architecture. We present the estimation of Block-LDPC coding system implementation key metrics including the throughput and hardware complexity for both encoder and decoder. The good error-correcting performance of Block-LDPC codes has been demonstrated through computer simulations. With the effective encoder/decoder design and good error-correcting performance, Block-LDPC provides a promising vehicle for real-life LDPC coding system implementations.
Bibliografie:ObjectType-Article-2
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ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2005.844113