Block-LDPC: a practical LDPC coding system design approach

This paper presents a joint low-density parity-check (LDPC) code-encoder-decoder design approach, called Block-LDPC, for practical LDPC coding system implementations. The key idea is to construct LDPC codes subject to certain hardware-oriented constraints that ensure the effective encoder and decode...

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Veröffentlicht in:	IEEE transactions on circuits and systems. I, Regular papers Jg. 52; H. 4; S. 766 - 775
Hauptverfasser:	Zhong, Hao, Zhang, Tong
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York IEEE 01.04.2005 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	Bipartite graph Computer architecture Computer errors Decoder Digital video broadcasting encoder Hardware Iterative decoding low-density parity check (LDPC) Message passing Parity check codes Routing Throughput very large-scale integration (VLSI) architecture
ISSN:	1549-8328, 1558-0806
Online-Zugang:	Volltext
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